Integrated circuits (ICs) and other electronic devices often include arrangements of interconnected field effect transistors (FETs), also called metal-oxide-semiconductor field effect transistors (MOSFETs), or simply MOS transistors or devices. A typical MOS transistor includes a gate electrode as a control electrode and spaced apart source and drain electrodes. A control voltage applied to the gate electrode controls the flow of current through a controllable conductive channel between the source and drain electrodes.
Power transistor devices are designed to be tolerant of the high currents and voltages that are present in power applications such as motion control, air bag deployment, and automotive fuel injector drivers. One type of power MOS transistor device is a laterally diffused metal-oxide-semiconductor (LDMOS) transistor device. In an LDMOS transistor device, a drift space is provided between the channel region and the drain region.
LDMOS transistor devices are often used in applications, such as automotive applications, involving operational voltage levels greater than 45 Volts. LDMOS transistor devices are designed to avoid breakdown events from the high electric fields resulting from such operational voltage levels.
LDMOS transistor and other integrated circuit (IC) devices remain at risk of breakdown damage due to electrostatic discharge (ESD) events. ESD events may be caused by an electrostatically charged person holding an IC chip. An ESD event may involve electrostatic potentials of 4000 Volts or more between input/output (I/O) terminals of the IC chip. During the ESD event, a discharge current typically flows between the I/O terminal and ground through vulnerable circuitry in the IC chip. Device degradation or failure may occur when ESD-based breakdown occurs along the current conduction path between the drain and source of an LDMOS device.
ESD protection devices are commonly incorporated into IC chips across terminals of the IC chip. ESD protection devices are often configured to provide another path to ground for the discharge current. For example, an ESD protection device may be connected between an I/O terminal and a ground or common terminal. The ESD protection device acts as a voltage limiter to prevent the voltage between the I/O terminal and the ground terminal from reaching levels that would otherwise harm other devices on the chip.
One type of ESD protection device is an ESD clamp. The clamp may be placed in parallel with the LDMOS transistor device and configured to breakdown at a lower level than the LDMOS transistor device. For example, the drain voltage of an LDMOS transistor device may be clamped to a level between the expected operating voltage of the LDMOS transistor device and the intrinsic breakdown voltage of the LDMOS transistor device. Unfortunately, ESD clamps often use up significant space and lead to additional fabrication costs.